diff options
| author | 2021-02-09 14:42:35 -0500 | |
|---|---|---|
| committer | 2021-02-22 18:05:23 -0500 | |
| commit | c6341f008a315bdfddcca93892bfe702fb7b8dbe (patch) | |
| tree | dcf895e167186b2b21322f1f1193ef828bd205c6 | |
| parent | drm/amd/display: Refactor debugfs entries for all connectors (diff) | |
drm/amd/display: disable seamless boot for DP MST
[Why]
Seamless boot over DP MST is not POR, but is not explicitly disabled.
[How]
Add check for DP MST and return false in
dc_validate_seamless_boot_timing.
Signed-off-by: Anthony Wang <anthony1.wang@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 702c266e60f8..03882004e935 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1213,8 +1213,9 @@ bool dc_validate_seamless_boot_timing(const struct dc *dc, unsigned int i, enc_inst, tg_inst = 0; // Seamless port only support single DP and EDP so far - if (sink->sink_signal != SIGNAL_TYPE_DISPLAY_PORT && - sink->sink_signal != SIGNAL_TYPE_EDP) + if ((sink->sink_signal != SIGNAL_TYPE_DISPLAY_PORT && + sink->sink_signal != SIGNAL_TYPE_EDP) || + sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST) return false; /* Check for enabled DIG to identify enabled display */ |
