diff options
| author |   Nadav Amit <namit@cs.technion.ac.il> | 2014-11-26 17:56:25 +0200 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2014-12-04 15:29:05 +0100 |
| commit | c69d3d9bc168b31de2072bf91c7e6879943b1381 (patch) | |
| tree | 58a804bb515eef476cfc027363056a5c337cbcaa | |
| parent | KVM: x86: Generate #UD when memory operand is required (diff) | |
KVM: x86: Fix reserved x2apic registers
x2APIC has no registers for DFR and ICR2 (see Intel SDM 10.12.1.2 "x2APIC
Register Address Space"). KVM needs to cause #GP on such accesses.
Fix it (DFR and ICR2 on read, ICR2 on write, DFR already handled on writes).
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | arch/x86/kvm/lapic.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index f739f804b3a2..1b9bf964f3e4 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1883,6 +1883,9 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data) if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic)) return 1; + if (reg == APIC_ICR2) + return 1; + /* if this is ICR write vector before command */ if (msr == 0x830) apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32)); @@ -1897,6 +1900,12 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data) if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic)) return 1; + if (reg == APIC_DFR || reg == APIC_ICR2) { + apic_debug("KVM_APIC_READ: read x2apic reserved register %x\n", + reg); + return 1; + } + if (apic_reg_read(apic, reg, 4, &low)) return 1; if (msr == 0x830) |