diff options
author | 2022-05-03 10:56:54 -0400 | |
---|---|---|
committer | 2022-06-06 14:42:14 -0400 | |
commit | c7eac19eda0a82f0c1dd9455012754445772fd09 (patch) | |
tree | 7ca406c510af8a8273524ba6404a87900d3b7ba8 | |
parent | drm/amd/display: fix system hang when PSR exits (diff) | |
download | linux-dev-c7eac19eda0a82f0c1dd9455012754445772fd09.tar.xz linux-dev-c7eac19eda0a82f0c1dd9455012754445772fd09.zip |
drm/amd/display: Set PSR level to enable ALPM by default
[Why & How]
While support ALPM, do ALPM state transition while PSR entry/exit.
ALPM is needed for PSR-SU feature, and since the function is ready,
we'd enable it by default.
- Add psr level definition to enable/disable ALPM and set ALPM
powerdone mode.
- Enable ALPM by default
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 4 |
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 68e9fc6b510c..31ffb961e18b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3364,6 +3364,10 @@ bool dc_link_setup_psr(struct dc_link *link, */ psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1; + /* enable ALPM */ + psr_context->psr_level.bits.DISABLE_ALPM = 0; + psr_context->psr_level.bits.ALPM_DEFAULT_PD_MODE = 1; + /* Controls additional delay after remote frame capture before * continuing power down, default = 0 */ diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 144c387010c2..26b62f50ac4e 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -698,7 +698,9 @@ union dmcu_psr_level { unsigned int SKIP_AUTO_STATE_ADVANCE:1; unsigned int DISABLE_PSR_ENTRY_ABORT:1; unsigned int SKIP_SINGLE_OTG_DISABLE:1; - unsigned int RESERVED:22; + unsigned int DISABLE_ALPM:1; + unsigned int ALPM_DEFAULT_PD_MODE:1; + unsigned int RESERVED:20; } bits; unsigned int u32all; }; |