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authorPaul Burton <paul.burton@mips.com>2018-11-07 23:05:46 +0000
committerPaul Burton <paul.burton@mips.com>2018-11-07 16:26:42 -0800
commitd08b8ccc476215ceee6e3370f0c1732d5f83f5ef (patch)
treea1c5a58d7f8c42f654fb9404706c639531acd673
parentMIPS: Remove GCC_IMM_ASM & GCC_REG_ACCUM macros (diff)
downloadlinux-dev-d08b8ccc476215ceee6e3370f0c1732d5f83f5ef.tar.xz
linux-dev-d08b8ccc476215ceee6e3370f0c1732d5f83f5ef.zip
MIPS: Simplify GCC_OFF_SMALL_ASM definition
The GCC_OFF_SMALL_ASM macro defines the constraint to use for instructions needing "small offsets", typically the LL or SC instructions. Historically these had 16 bit offsets, but microMIPS & MIPS32/MIPS64r6 onwards reduced the width of the offset field. GCC 4.9 & higher supports a ZC constraint which matches the offset requirements of the LL & SC instructions. Where supported we can use the ZC constraint regardless of ISA, and it will handle the requirements of the ISA correctly. As such we require 3 cases: - GCC 4.9 & higher can use ZC. - GCC older than 4.9 must use the older R constraint, which does not take into account microMIPS or MIPSr6. - microMIPS builds therefore require GCC 4.9 or higher. MIPSr6 support was only introduced in newer compilers anyway so it can be ignored here. The current code complicates this a little by specifically having MIPSr6 bypass the GCC version check, and using the R constraint for pre-MIPSr6 builds even if the compiler supports ZC which would be equivalent. Simplify this such that the code straightforwardly implements the 3 cases outlined above. For non-GCC compilers we presume that ZC is safe to use. In practice the only non-GCC compiler of interest is clang and it has supported the ZC constraint since version 3.7.0. It seems safe enough to presume that nobody will expect to built a working kernel using a clang version older than that, and if they do then they'll have bigger problems. As such we don't check the clang version number & just presume ZC is usable when the compiler is not GCC. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20999/ Cc: linux-mips@linux-mips.org
-rw-r--r--arch/mips/include/asm/compiler.h18
1 files changed, 7 insertions, 11 deletions
diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
index 9196fca4335d..f77e99f1722e 100644
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -43,18 +43,14 @@
#undef barrier_before_unreachable
#define barrier_before_unreachable() asm volatile(".insn")
-#ifdef CONFIG_CPU_MIPSR6
-/* All MIPS R6 toolchains support the ZC constrain */
-#define GCC_OFF_SMALL_ASM() "ZC"
-#else
-#ifndef CONFIG_CPU_MICROMIPS
-#define GCC_OFF_SMALL_ASM() "R"
-#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
-#define GCC_OFF_SMALL_ASM() "ZC"
+#if !defined(CONFIG_CC_IS_GCC) || \
+ (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
+# define GCC_OFF_SMALL_ASM() "ZC"
+#elif defined(CONFIG_CPU_MICROMIPS)
+# error "microMIPS compilation unsupported with GCC older than 4.9"
#else
-#error "microMIPS compilation unsupported with GCC older than 4.9"
-#endif /* CONFIG_CPU_MICROMIPS */
-#endif /* CONFIG_CPU_MIPSR6 */
+# define GCC_OFF_SMALL_ASM() "R"
+#endif
#ifdef CONFIG_CPU_MIPSR6
#define MIPS_ISA_LEVEL "mips64r6"