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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-04-30 14:19:00 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-05-04 10:23:27 +0200
commitd414b7a3f370d640cff544a3aa3a41abf34fd5d6 (patch)
tree98a4115a9541e46a10cf49ae5e62f86d657cd45e
parentARM: dts: s5pv210: drop useless 'dma-channels/requests' properties (diff)
downloadlinux-dev-d414b7a3f370d640cff544a3aa3a41abf34fd5d6.tar.xz
linux-dev-d414b7a3f370d640cff544a3aa3a41abf34fd5d6.zip
ARM: dts: exynos: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220430121902.59895-8-krzysztof.kozlowski@linaro.org
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi6
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi8
-rw-r--r--arch/arm/boot/dts/exynos5410.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi10
6 files changed, 0 insertions, 34 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 41bb421e67c2..78dad233ff34 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -429,8 +429,6 @@
clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -440,8 +438,6 @@
clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
adc: adc@126c0000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 5fd17bc52321..6f0ca3354e39 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -676,8 +676,6 @@
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -687,8 +685,6 @@
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
mdma1: dma-controller@12850000 {
@@ -698,8 +694,6 @@
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
fimd: fimd@11c00000 {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 138d606d58a5..62bf335d5bed 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -666,8 +666,6 @@
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
power-domains = <&pd_lcd0>;
};
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index df80ddfada2d..4708dcd575a7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -700,8 +700,6 @@
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -711,8 +709,6 @@
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -722,8 +718,6 @@
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -733,8 +727,6 @@
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
gsc_0: gsc@13e00000 {
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 4d797a9abba4..8a6b890fb8f7 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -196,8 +196,6 @@
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -207,8 +205,6 @@
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
audi2s0: i2s@3830000 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 21b608705049..9f2523a873d9 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -437,8 +437,6 @@
clocks = <&clock_audss EXYNOS_ADMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <6>;
- #dma-requests = <16>;
power-domains = <&mau_pd>;
};
@@ -449,8 +447,6 @@
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -460,8 +456,6 @@
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -471,8 +465,6 @@
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -482,8 +474,6 @@
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
/*
* MDMA1 can support both secure and non-secure
* AXI transactions. When this is enabled in