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| author |   Bard Liao <bardliao@realtek.com> | 2015-04-30 18:18:43 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2015-05-01 17:33:47 +0100 |
| commit | de97c15b3c74ebc33f5470efaa22112444b80298 (patch) | |
| tree | 5802eec728edb72a0e538cd514659d912fa2f1aa | |
| parent | ASoC: rt5645: remove RT5645_I2S_BCLK_MS1 control (diff) | |
| download | linux-dev-de97c15b3c74ebc33f5470efaa22112444b80298.tar.xz linux-dev-de97c15b3c74ebc33f5470efaa22112444b80298.zip | |
ASoC: rt5645: fix PLL source register definitions
Fix PLL source register definitions.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/rt5645.h | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/sound/soc/codecs/rt5645.h b/sound/soc/codecs/rt5645.h index fa5c56037d58..18978894eb63 100644 --- a/sound/soc/codecs/rt5645.h +++ b/sound/soc/codecs/rt5645.h @@ -1063,13 +1063,14 @@ #define RT5645_SCLK_SRC_SFT 14 #define RT5645_SCLK_SRC_MCLK (0x0 << 14) #define RT5645_SCLK_SRC_PLL1 (0x1 << 14) -#define RT5645_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */ -#define RT5645_PLL1_SRC_MASK (0x3 << 12) -#define RT5645_PLL1_SRC_SFT 12 -#define RT5645_PLL1_SRC_MCLK (0x0 << 12) -#define RT5645_PLL1_SRC_BCLK1 (0x1 << 12) -#define RT5645_PLL1_SRC_BCLK2 (0x2 << 12) -#define RT5645_PLL1_SRC_BCLK3 (0x3 << 12) +#define RT5645_SCLK_SRC_RCCLK (0x2 << 14) +#define RT5645_PLL1_SRC_MASK (0x7 << 11) +#define RT5645_PLL1_SRC_SFT 11 +#define RT5645_PLL1_SRC_MCLK (0x0 << 11) +#define RT5645_PLL1_SRC_BCLK1 (0x1 << 11) +#define RT5645_PLL1_SRC_BCLK2 (0x2 << 11) +#define RT5645_PLL1_SRC_BCLK3 (0x3 << 11) +#define RT5645_PLL1_SRC_RCCLK (0x4 << 11) #define RT5645_PLL1_PD_MASK (0x1 << 3) #define RT5645_PLL1_PD_SFT 3 #define RT5645_PLL1_PD_1 (0x0 << 3) |