aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2019-03-29 09:50:18 -0700
committerChris Wilson <chris@chris-wilson.co.uk>2019-03-29 17:59:12 +0000
commite15be4298f3570366d40dbec06e5b0d6e0626eb4 (patch)
tree53cab03ef5231d100966a66a1f328957dbf2bb95
parentdrm/i915: move the edram detection out of uncore init (diff)
downloadlinux-dev-e15be4298f3570366d40dbec06e5b0d6e0626eb4.tar.xz
linux-dev-e15be4298f3570366d40dbec06e5b0d6e0626eb4.zip
drm/i915: fix i9xx irq enable/disable
Those functions are used on gen4 as well and gen4 does have a non-RCS engine, so remove the BUG_ON and flip back the logic to what it was before the ENGINE_READ/WRITE update v2: update the posting read as well (Chris, Ville). Fixes: baba6e572b38 ("drm/i915: take a reference to uncore in the engine and use it") Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190329165018.32953-1-daniele.ceraolospurio@intel.com
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 48ba4d61a4ae..8a19eee9c5d4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -976,20 +976,16 @@ gen5_irq_disable(struct intel_engine_cs *engine)
static void
i9xx_irq_enable(struct intel_engine_cs *engine)
{
- GEM_BUG_ON(engine->id != RCS0);
-
engine->i915->irq_mask &= ~engine->irq_enable_mask;
- ENGINE_WRITE(engine, RING_IMR, engine->i915->irq_mask);
- ENGINE_POSTING_READ(engine, RING_IMR);
+ intel_uncore_write(engine->uncore, IMR, engine->i915->irq_mask);
+ intel_uncore_posting_read_fw(engine->uncore, IMR);
}
static void
i9xx_irq_disable(struct intel_engine_cs *engine)
{
- GEM_BUG_ON(engine->id != RCS0);
-
engine->i915->irq_mask |= engine->irq_enable_mask;
- ENGINE_WRITE(engine, RING_IMR, engine->i915->irq_mask);
+ intel_uncore_write(engine->uncore, IMR, engine->i915->irq_mask);
}
static void