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| author |   Thierry Reding <treding@nvidia.com> | 2021-12-07 11:23:43 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-14 16:07:42 +0100 |
| commit | e51c87b7cb1a41d99e059ca3a9c8edf41656ce1f (patch) | |
| tree | bccf67933fb157936748d5af393f1b841f57bac9 | |
| parent | ARM: tegra: Fix Tegra124 I2C compatible string list (diff) | |
| download | linux-dev-e51c87b7cb1a41d99e059ca3a9c8edf41656ce1f.tar.xz linux-dev-e51c87b7cb1a41d99e059ca3a9c8edf41656ce1f.zip | |
ARM: tegra: Drop unused AHCI clocks on Tegra124
The CML1 and PLL_E clocks are never explicitly used by the AHCI
controller found on Tegra124, so drop them from the corresponding device
tree node.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 0e0a769fb30f..36566a777e49 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -672,10 +672,8 @@ <0x0 0x70020000 0x0 0x7000>; /* SATA */ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_SATA>, - <&tegra_car TEGRA124_CLK_SATA_OOB>, - <&tegra_car TEGRA124_CLK_CML1>, - <&tegra_car TEGRA124_CLK_PLL_E>; - clock-names = "sata", "sata-oob", "cml1", "pll_e"; + <&tegra_car TEGRA124_CLK_SATA_OOB>; + clock-names = "sata", "sata-oob"; resets = <&tegra_car 124>, <&tegra_car 129>, <&tegra_car 123>; |