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authorKrzysztof Kozlowski <krzk@kernel.org>2020-12-10 22:25:21 +0100
committerKrzysztof Kozlowski <krzk@kernel.org>2021-03-07 20:56:17 +0100
commite52dcd6e70fab51f53292e53336ecb007bb60889 (patch)
tree597d3a92ea0edce8a770ab2cc660a2cdd4521fc0
parentARM: dts: exynos: correct MUIC interrupt trigger level on Midas family (diff)
downloadlinux-dev-e52dcd6e70fab51f53292e53336ecb007bb60889.tar.xz
linux-dev-e52dcd6e70fab51f53292e53336ecb007bb60889.zip
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
The Maxim PMIC datasheets describe the interrupt line as active low with a requirement of acknowledge from the CPU. Without specifying the interrupt type in Devicetree, kernel might apply some fixed configuration, not necessarily working for this hardware. Additionally, the interrupt line is shared so using level sensitive interrupt is here especially important to avoid races. Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
-rw-r--r--arch/arm/boot/dts/exynos4412-midas.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index d75f554efde0..fc77c1bfd844 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -665,7 +665,7 @@
max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
- interrupts = <7 IRQ_TYPE_NONE>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&max77686_irq>;
pinctrl-names = "default";
reg = <0x09>;