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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2019-09-03 09:43:26 -0700
committerHerbert Xu <herbert@gondor.apana.org.au>2019-09-09 17:35:28 +1000
commite53b43d8d41f6c9bab8b4db73e64bc23c8063795 (patch)
tree104c8eab942931110f80369e0e73738fe8fe6a99
parentcrypto: arm/aes-ce - switch to 4x interleave (diff)
downloadlinux-dev-e53b43d8d41f6c9bab8b4db73e64bc23c8063795.tar.xz
linux-dev-e53b43d8d41f6c9bab8b4db73e64bc23c8063795.zip
crypto: arm/aes-ce - replace tweak mask literal with composition
Replace the vector load from memory sequence with a simple instruction sequence to compose the tweak vector directly. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--arch/arm/crypto/aes-ce-core.S9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/crypto/aes-ce-core.S b/arch/arm/crypto/aes-ce-core.S
index a3ca4ac2d7bb..bb6ec1844370 100644
--- a/arch/arm/crypto/aes-ce-core.S
+++ b/arch/arm/crypto/aes-ce-core.S
@@ -382,13 +382,10 @@ ENDPROC(ce_aes_ctr_encrypt)
veor \out, \out, \tmp
.endm
- .align 3
-.Lxts_mul_x:
- .quad 1, 0x87
-
ce_aes_xts_init:
- vldr d30, .Lxts_mul_x
- vldr d31, .Lxts_mul_x + 8
+ vmov.i32 d30, #0x87 @ compose tweak mask vector
+ vmovl.u32 q15, d30
+ vshr.u64 d30, d31, #7
ldrd r4, r5, [sp, #16] @ load args
ldr r6, [sp, #28]