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| author |   Michal Simek <michal.simek@xilinx.com> | 2021-06-14 17:25:38 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-09-13 08:55:55 +0200 |
| commit | e6a52b9e3bec66c0da3e0e3b0a04be0e09de3986 (patch) | |
| tree | 2e0f95ffae6b7bbcbb070809e53466601d43ef56 | |
| parent | arm64: zynqmp: Remove description for 8T49N287 and si5382 chips (diff) | |
| download | linux-dev-e6a52b9e3bec66c0da3e0e3b0a04be0e09de3986.tar.xz linux-dev-e6a52b9e3bec66c0da3e0e3b0a04be0e09de3986.zip | |
arm64: zynqmp: Add support for zcu102-rev1.1 board
zcu102 rev1.1 compare to rev1.0 is using by default different DDR memory
which requires different configuration. The reason for adding this file to
Linux kernel is that U-Boot fdtfile variable is composed based on board
revision (in eeprom) and dtb file should exist in standard distibutions for
passing it to Linux kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/38bbbeb885f4d9ba466c43ab9b4d25190a3552fb.1623684253.git.michal.simek@xilinx.com
| -rw-r--r-- | Documentation/devicetree/bindings/arm/xilinx.yaml | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts | 15 |
3 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml index f52c7e8ce654..a0b1ae6e3e71 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.yaml +++ b/Documentation/devicetree/bindings/arm/xilinx.yaml @@ -87,6 +87,7 @@ properties: - xlnx,zynqmp-zcu102-revA - xlnx,zynqmp-zcu102-revB - xlnx,zynqmp-zcu102-rev1.0 + - xlnx,zynqmp-zcu102-rev1.1 - const: xlnx,zynqmp-zcu102 - const: xlnx,zynqmp diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile index 11fb4fd3ebd4..083ed52337fd 100644 --- a/arch/arm64/boot/dts/xilinx/Makefile +++ b/arch/arm64/boot/dts/xilinx/Makefile @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.1.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revC.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts new file mode 100644 index 000000000000..b6798394fcf4 --- /dev/null +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU102 Rev1.1 + * + * (C) Copyright 2016 - 2020, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +#include "zynqmp-zcu102-rev1.0.dts" + +/ { + model = "ZynqMP ZCU102 Rev1.1"; + compatible = "xlnx,zynqmp-zcu102-rev1.1", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; +}; |