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| author |   Stefan Agner <stefan@agner.ch> | 2016-04-01 23:13:41 -0700 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2016-04-13 17:48:00 +0800 |
| commit | ef4a4e14ceeaec542e71d97e38912cbf83691541 (patch) | |
| tree | ede336dfbad382dedf34d560eb0962792e20b61d | |
| parent | ARM: dts: vf-colibri: increase NAND clock speed (diff) | |
| download | linux-dev-ef4a4e14ceeaec542e71d97e38912cbf83691541.tar.xz linux-dev-ef4a4e14ceeaec542e71d97e38912cbf83691541.zip | |
ARM: dts: vfxxx: add missing reg properties
Add missing reg properties to AIPS bus and Cortex-A5's PMU unit.
This change avoids the following warnings:
Warning (unit_address_vs_reg): Node /soc/aips-bus@40000000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000/pmu@40089000
has a unit name, but no reg property
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/vf500.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vfxxx.dtsi | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index 9d372720ad3f..a3824e61bd72 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -81,6 +81,7 @@ compatible = "arm,cortex-a5-pmu"; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&a5_cpu>; + reg = <0x40089000 0x1000>; }; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 5c0975451d4e..04ef54d45a91 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -95,6 +95,7 @@ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; + reg = <0x40000000 0x00070000>; ranges; mscm_cpucfg: cpucfg@40001000 { @@ -481,6 +482,7 @@ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; + reg = <0x40080000 0x0007f000>; ranges; edma1: dma-controller@40098000 { |