diff options
| author |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2007-02-23 21:39:38 +0100 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2007-02-26 23:06:06 +0000 |
| commit | f13cc01d8d3630ba42680ac56b3bedfce812e531 (patch) | |
| tree | 0737d5e36474827dff3bc05cb1071946b3e366fa | |
| parent | [MIPS] RTLX: Delete multiple definition of ret shaddowing each other. (diff) | |
| download | linux-dev-f13cc01d8d3630ba42680ac56b3bedfce812e531.tar.xz linux-dev-f13cc01d8d3630ba42680ac56b3bedfce812e531.zip | |
[MIPS] SNI: MIPS_CPU_IRQ_BASE cleanup
Use MIPS_CPU_IRQ_BASE instead of own define.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/sni/pcimt.c | 4 | ||||
| -rw-r--r-- | arch/mips/sni/pcit.c | 12 | ||||
| -rw-r--r-- | arch/mips/sni/rm200.c | 2 | ||||
| -rw-r--r-- | include/asm-mips/sni.h | 9 |
4 files changed, 13 insertions, 14 deletions
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 6c0dad7cbf4e..39e5b4abc555 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -336,9 +336,9 @@ static void sni_pcimt_hwint(void) u32 pending = (read_c0_cause() & read_c0_status()); if (pending & C_IRQ5) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); + do_IRQ (MIPS_CPU_IRQ_BASE + 7); else if (pending & C_IRQ4) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 6); + do_IRQ (MIPS_CPU_IRQ_BASE + 6); else if (pending & C_IRQ3) pcimt_hwint3(); else if (pending & C_IRQ1) diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 3921096023c3..8d6b3d5b13a1 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -276,11 +276,11 @@ static void sni_pcit_hwint(void) if (pending & C_IRQ1) pcit_hwint1(); else if (pending & C_IRQ2) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 4); + do_IRQ (MIPS_CPU_IRQ_BASE + 4); else if (pending & C_IRQ3) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 5); + do_IRQ (MIPS_CPU_IRQ_BASE + 5); else if (pending & C_IRQ5) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); + do_IRQ (MIPS_CPU_IRQ_BASE + 7); } static void sni_pcit_hwint_cplus(void) @@ -290,11 +290,11 @@ static void sni_pcit_hwint_cplus(void) if (pending & C_IRQ0) pcit_hwint0(); else if (pending & C_IRQ2) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 4); + do_IRQ (MIPS_CPU_IRQ_BASE + 4); else if (pending & C_IRQ3) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 5); + do_IRQ (MIPS_CPU_IRQ_BASE + 5); else if (pending & C_IRQ5) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); + do_IRQ (MIPS_CPU_IRQ_BASE + 7); } void __init sni_pcit_irq_init(void) diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 517dc698c083..b82ff129f5ea 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c @@ -148,7 +148,7 @@ static void sni_rm200_hwint(void) int irq; if (pending & C_IRQ5) - do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); + do_IRQ (MIPS_CPU_IRQ_BASE + 7); else if (pending & C_IRQ0) { clear_c0_status (IE_IRQ0); mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index 62f9be6f7320..f257509b914f 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -141,10 +141,9 @@ extern unsigned int sni_brd_type; #define A20R_PT_TIM0_ACK 0xbc050000 #define A20R_PT_TIM1_ACK 0xbc060000 -#define SNI_MIPS_IRQ_CPU_BASE 16 -#define SNI_MIPS_IRQ_CPU_TIMER (SNI_MIPS_IRQ_CPU_BASE+7) +#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7) -#define SNI_A20R_IRQ_BASE SNI_MIPS_IRQ_CPU_BASE +#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) #define SNI_DS1216_A20R_BASE 0xbc081ffc @@ -155,7 +154,7 @@ extern unsigned int sni_brd_type; #define SNI_PCIT_INT_START 24 #define SNI_PCIT_INT_END 30 -#define PCIT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE + 5) +#define PCIT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE + 5) #define PCIT_IRQ_INTA (SNI_PCIT_INT_START + 0) #define PCIT_IRQ_INTB (SNI_PCIT_INT_START + 1) #define PCIT_IRQ_INTC (SNI_PCIT_INT_START + 2) @@ -180,7 +179,7 @@ extern unsigned int sni_brd_type; #define PCIMT_IRQ_EISA 29 #define PCIMT_IRQ_SCSI 30 -#define PCIMT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE+6) +#define PCIMT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE+6) #if 0 #define PCIMT_IRQ_TEMPERATURE 24 |