diff options
| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-02-27 20:37:40 +0000 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-04 11:05:45 +0200 |
| commit | f35a868bcf95c066a00dcae9e7ee42d85eaf05b2 (patch) | |
| tree | 7a3fb29da818f51dae591c79121b2a8bc12f69a5 | |
| parent | arm64: dts: renesas: r9a07g054: Fillup the OSTM{0,1,2} stub nodes (diff) | |
arm64: dts: renesas: r9a07g054: Fillup the WDT{0,1,2} stub nodes
Fillup the WDT{0,1,2} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 36 |
1 files changed, 33 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 50cb2f0e6e73..a3623e70f02c 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -614,18 +614,48 @@ }; wdt0: watchdog@12800800 { + compatible = "renesas,r9a07g054-wdt", + "renesas,rzg2l-wdt"; reg = <0 0x12800800 0 0x400>; - /* place holder */ + clocks = <&cpg CPG_MOD R9A07G054_WDT0_PCLK>, + <&cpg CPG_MOD R9A07G054_WDT0_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "wdt", "perrout"; + resets = <&cpg R9A07G054_WDT0_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; }; wdt1: watchdog@12800c00 { + compatible = "renesas,r9a07g054-wdt", + "renesas,rzg2l-wdt"; reg = <0 0x12800C00 0 0x400>; - /* place holder */ + clocks = <&cpg CPG_MOD R9A07G054_WDT1_PCLK>, + <&cpg CPG_MOD R9A07G054_WDT1_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "wdt", "perrout"; + resets = <&cpg R9A07G054_WDT1_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; }; wdt2: watchdog@12800400 { + compatible = "renesas,r9a07g054-wdt", + "renesas,rzg2l-wdt"; reg = <0 0x12800400 0 0x400>; - /* place holder */ + clocks = <&cpg CPG_MOD R9A07G054_WDT2_PCLK>, + <&cpg CPG_MOD R9A07G054_WDT2_CLK>; + clock-names = "pclk", "oscclk"; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "wdt", "perrout"; + resets = <&cpg R9A07G054_WDT2_PRESETN>; + power-domains = <&cpg>; + status = "disabled"; }; ostm0: timer@12801000 { |