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| author |   Arnd Bergmann <arnd@arndb.de> | 2013-06-21 19:54:13 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-21 19:54:13 +0200 |
| commit | f7bea65be78ca165c6b44f28497ae6f5dfc7db26 (patch) | |
| tree | 12f50b821bdb3c5ef0d469da1b1f10099137ce89 | |
| parent | Merge branch 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351 into next/dt (diff) | |
| parent | ARM: Kirkwood: Fix the internal register ranges translation (diff) | |
| download | linux-dev-f7bea65be78ca165c6b44f28497ae6f5dfc7db26.tar.xz linux-dev-f7bea65be78ca165c6b44f28497ae6f5dfc7db26.zip | |
Merge tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
mvebu dt changes for v3.11 (round 6)
- mvebu
- mini-PCIe connectors on Armada 370 RD
- kirkwood
- correct internal register ranges translation
* tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: Fix the internal register ranges translation
arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/armada-370-rd.dts | 16 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kirkwood.dtsi | 5 |
2 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 89c21106cfa9..a3a2fedb8726 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -85,6 +85,22 @@ gpios = <&gpio0 6 1>; }; }; + + pcie-controller { + status = "okay"; + + /* Internal mini-PCIe connector */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + /* Internal mini-PCIe connector */ + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 5d7b759f06a8..1ae3eb2dea2e 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -30,7 +30,8 @@ ocp@f1000000 { compatible = "simple-bus"; - ranges = <0x00000000 0xf1000000 0x4000000 + ranges = <0x00000000 0xf1000000 0x0100000 + 0xf4000000 0xf4000000 0x0000400 0xf5000000 0xf5000000 0x0000400>; #address-cells = <1>; #size-cells = <1>; @@ -163,7 +164,7 @@ ale = <1>; bank-width = <1>; compatible = "marvell,orion-nand"; - reg = <0x3000000 0x400>; + reg = <0xf4000000 0x400>; chip-delay = <25>; /* set partition map and/or chip-delay in board dts */ clocks = <&gate_clk 7>; |