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| author |   Catalin Marinas <catalin.marinas@arm.com> | 2019-10-28 14:57:16 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-10-28 15:30:52 +0000 |
| commit | ba95e9bd963784088709050b72363f57c4861deb (patch) | |
| tree | fd4abf406de2d5519bd68626d7c26eca4e8bb5a1 /COPYING | |
| parent | Linux 5.4-rc3 (diff) | |
| parent | Merge branch 'errata/tx2-219' into for-next/fixes (diff) | |
| download | linux-dev-ba95e9bd963784088709050b72363f57c4861deb.tar.xz linux-dev-ba95e9bd963784088709050b72363f57c4861deb.zip | |
Merge remote-tracking branch 'arm64/for-next/fixes' into for-next/core
This is required to solve the conflicts with subsequent merges of two
more errata workaround branches.
* arm64/for-next/fixes:
arm64: tags: Preserve tags for addresses translated via TTBR1
arm64: mm: fix inverted PAR_EL1.F check
arm64: sysreg: fix incorrect definition of SYS_PAR_EL1_F
arm64: entry.S: Do not preempt from IRQ before all cpufeatures are enabled
arm64: hibernate: check pgd table allocation
arm64: cpufeature: Treat ID_AA64ZFR0_EL1 as RAZ when SVE is not enabled
arm64: Fix kcore macros after 52-bit virtual addressing fallout
arm64: Allow CAVIUM_TX2_ERRATUM_219 to be selected
arm64: Avoid Cavium TX2 erratum 219 when switching TTBR
arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT
arm64: KVM: Trap VM ops when ARM64_WORKAROUND_CAVIUM_TX2_219_TVM is set
Diffstat (limited to 'COPYING')
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