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authorJeremy Linton <jeremy.linton@arm.com>2022-09-12 15:37:22 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2022-09-24 18:43:46 +0200
commitae2df912d1a557a3548be83da20851ac55f42ab3 (patch)
tree2e7a5615eb34e9034e0579a404bc3f8df30596a3 /Documentation/admin-guide
parentACPI: CPPC: Add ACPI disabled check to acpi_cpc_valid() (diff)
downloadlinux-dev-ae2df912d1a557a3548be83da20851ac55f42ab3.tar.xz
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ACPI: CPPC: Disable FIE if registers in PCC regions
PCC regions utilize a mailbox to set/retrieve register values used by the CPPC code. This is fine as long as the operations are infrequent. With the FIE code enabled though the overhead can range from 2-11% of system CPU overhead (ex: as measured by top) on Arm based machines. So, before enabling FIE assure none of the registers used by cppc_get_perf_ctrs() are in the PCC region. Finally, add a module parameter which can override the PCC region detection at boot or module reload. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Ionela Voinescu <ionela.voinescu@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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