diff options
| author |   Kim Phillips <kim.phillips@amd.com> | 2022-06-14 23:15:51 +0200 |
|---|---|---|
| committer |   Borislav Petkov <bp@suse.de> | 2022-06-27 10:33:59 +0200 |
| commit | e8ec1b6e08a2102d8755ccb06fa26d540f26a2fa (patch) | |
| tree | 14b346f88fd8e702973366cb4392e90d7aa4931c /Documentation/admin-guide | |
| parent | x86/bugs: Add AMD retbleed= boot parameter (diff) | |
| download | linux-dev-e8ec1b6e08a2102d8755ccb06fa26d540f26a2fa.tar.xz linux-dev-e8ec1b6e08a2102d8755ccb06fa26d540f26a2fa.zip | |
x86/bugs: Enable STIBP for JMP2RET
For untrained return thunks to be fully effective, STIBP must be enabled
or SMT disabled.
Co-developed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'Documentation/admin-guide')
| -rw-r--r-- | Documentation/admin-guide/kernel-parameters.txt | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 529613367e7d..168e164f09eb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5201,11 +5201,17 @@ Speculative Code Execution with Return Instructions) vulnerability. - off - unconditionally disable - auto - automatically select a migitation - unret - force enable untrained return thunks, - only effective on AMD Zen {1,2} - based systems. + off - no mitigation + auto - automatically select a migitation + auto,nosmt - automatically select a mitigation, + disabling SMT if necessary for + the full mitigation (only on Zen1 + and older without STIBP). + unret - force enable untrained return thunks, + only effective on AMD f15h-f17h + based systems. + unret,nosmt - like unret, will disable SMT when STIBP + is not available. Selecting 'auto' will choose a mitigation method at run time according to the CPU. |