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| author |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2020-07-07 15:31:52 +0100 |
|---|---|---|
| committer |   Will Deacon <will@kernel.org> | 2020-07-08 22:20:41 +0100 |
| commit | 581fce373581772470af8fb4fe13505dc66281e6 (patch) | |
| tree | 49131ff4aa0307fac68cc9d7ee281840d7964905 /Documentation/arm64 | |
| parent | arm64: kgdb: Fix single-step exception handling oops (diff) | |
| download | linux-dev-581fce373581772470af8fb4fe13505dc66281e6.tar.xz linux-dev-581fce373581772470af8fb4fe13505dc66281e6.zip | |
arm64: Documentation: Fix broken table in generated HTML
cpu-feature-registers.rst is missing a new line before a couple
of tables listing the visible fields, causing broken tables in
the HTML documentation generated by "make htmldocs". Fix this
by adding the missing new line.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20200707143152.154541-1-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/arm64')
| -rw-r--r-- | Documentation/arm64/cpu-feature-registers.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst index 314fa5bc2655..f28853f80089 100644 --- a/Documentation/arm64/cpu-feature-registers.rst +++ b/Documentation/arm64/cpu-feature-registers.rst @@ -171,6 +171,7 @@ infrastructure: 3) ID_AA64PFR1_EL1 - Processor Feature Register 1 + +------------------------------+---------+---------+ | Name | bits | visible | +------------------------------+---------+---------+ @@ -181,6 +182,7 @@ infrastructure: 4) MIDR_EL1 - Main ID Register + +------------------------------+---------+---------+ | Name | bits | visible | +------------------------------+---------+---------+ |