aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/arm/bcm
diff options
context:
space:
mode:
authorChris Brand <chris.brand@broadcom.com>2016-05-11 14:36:19 -0700
committerFlorian Fainelli <f.fainelli@gmail.com>2016-06-06 11:50:40 -0700
commit31bda09d810d6948de31832964160acc002c7afa (patch)
tree7d593f8fc78311f2e10b4d544dcc741bf4cc2317 /Documentation/devicetree/bindings/arm/bcm
parentARM: BCM5301X: Enable SPI-NOR on dual flash devices (diff)
downloadlinux-dev-31bda09d810d6948de31832964160acc002c7afa.tar.xz
linux-dev-31bda09d810d6948de31832964160acc002c7afa.zip
Documentation: devicetree: Document BCM23550 bindings
Add binding document for Broadcom BCM23550 SoC. BCM23550 has a Cluster Dormant Control IP block that holds cores in an idle state. Introduce a new CPU enable method in which the CDC is accessed to bring the core online. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/bcm')
-rw-r--r--Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt36
-rw-r--r--Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt15
2 files changed, 51 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
new file mode 100644
index 000000000000..a3af54c0e404
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
@@ -0,0 +1,36 @@
+Broadcom Kona Family CPU Enable Method
+--------------------------------------
+This binding defines the enable method used for starting secondary
+CPUs in the following Broadcom SoCs:
+ BCM23550
+
+The enable method is specified by defining the following required
+properties in the "cpu" device tree node:
+ - enable-method = "brcm,bcm23550";
+ - secondary-boot-reg = <...>;
+
+The secondary-boot-reg property is a u32 value that specifies the
+physical address of the register used to request the ROM holding pen
+code release a secondary CPU. The value written to the register is
+formed by encoding the target CPU id into the low bits of the
+physical start address it should jump to.
+
+Example:
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ enable-method = "brcm,bcm23550";
+ secondary-boot-reg = <0x3500417c>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
new file mode 100644
index 000000000000..080baad923d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
@@ -0,0 +1,15 @@
+Broadcom BCM23550 device tree bindings
+--------------------------------------
+
+This document describes the device tree bindings for boards with the BCM23550
+SoC.
+
+Required root node property:
+ - compatible: brcm,bcm23550
+
+Example:
+ / {
+ model = "BCM23550 SoC";
+ compatible = "brcm,bcm23550";
+ [...]
+ }