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authorAbel Vesa <abel.vesa@nxp.com>2022-07-07 15:50:08 +0300
committerShawn Guo <shawnguo@kernel.org>2022-07-08 16:34:58 +0800
commit9056aa045173aeada210c68acf97aa31ad024d29 (patch)
treedef12d235e118fa76efc3eb1b7278c9bf0b4ddb1 /Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
parentbindings: arm: fsl: Add PHYTEC i.MX8MM devicetree bindings (diff)
downloadlinux-dev-9056aa045173aeada210c68acf97aa31ad024d29.tar.xz
linux-dev-9056aa045173aeada210c68acf97aa31ad024d29.zip
dt-bindings: clk: imx: Add fsl,scu-clk yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale, we need to split it between the right subsystems. This patch documents separately the 'clock' child node of the SCU main node. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt31
1 files changed, 0 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
index a87ec15e28d2..ef7f5222ac48 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
@@ -79,29 +79,6 @@ Required properties:
See detailed Resource ID list from:
include/dt-bindings/firmware/imx/rsrc.h
-Clock bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-This binding uses the common clock binding[1].
-
-Required properties:
-- compatible: Should be one of:
- "fsl,imx8dxl-clk"
- "fsl,imx8qm-clk"
- "fsl,imx8qxp-clk"
- followed by "fsl,scu-clk"
-- #clock-cells: Should be 2.
- Contains the Resource and Clock ID value.
-- clocks: List of clock specifiers, must contain an entry for
- each required entry in clock-names
-- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
-
-The clock consumer should specify the desired clock by having the clock
-ID in its "clocks" phandle cell.
-
-See the full list of clock IDs from:
-include/dt-bindings/clock/imx8qxp-clock.h
-
Pinctrl bindings based on SCU Message Protocol
------------------------------------------------------------
@@ -127,7 +104,6 @@ Required properties for Pinctrl sub nodes:
Please refer to i.MX8QXP Reference Manual for detailed
CONFIG settings.
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/power/power-domain.yaml
[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
@@ -208,11 +184,6 @@ firmware {
&lsio_mu1 1 3
&lsio_mu1 3 3>;
- clk: clk {
- compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
- #clock-cells = <2>;
- };
-
iomuxc {
compatible = "fsl,imx8qxp-iomuxc";
@@ -265,7 +236,5 @@ serial@5a060000 {
...
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart0>;
- clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
- clock-names = "ipg";
power-domains = <&pd IMX_SC_R_UART_0>;
};