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authorAntoine Ténart <antoine.tenart@free-electrons.com>2014-09-03 09:48:21 +0200
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-10-29 19:44:38 +0100
commitcdaea91019056fad4f21a697038a84606a6187cc (patch)
tree456bbbf829ab0dea1edc3303534941e49b7fd67b /Documentation/devicetree/bindings/arm/marvell,berlin.txt
parentARM: dts: berlin: enable the eSATA interface on the BG2Q DMP (diff)
downloadlinux-dev-cdaea91019056fad4f21a697038a84606a6187cc.tar.xz
linux-dev-cdaea91019056fad4f21a697038a84606a6187cc.zip
Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs
Add the reset binding documentation to the SoC binding documentation as the reset driver in Marvell Berlin SoC is part of the chip/system control registers. This patch adds the required properties to configure the reset controller. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/marvell,berlin.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/marvell,berlin.txt10
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
index 904de5781f44..a99eb9eb14c0 100644
--- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -106,11 +106,21 @@ Required subnode-properties:
- groups: a list of strings describing the group names.
- function: a string describing the function used to mux the groups.
+* Reset controller binding
+
+A reset controller is part of the chip control registers set. The chip control
+node also provides the reset. The register set is not at the same offset between
+Berlin SoCs.
+
+Required property:
+- #reset-cells: must be set to 2
+
Example:
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
+ #reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>, <&externaldev 0>;
clock-names = "refclk", "video_ext0";