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author | Sean Wang <sean.wang@mediatek.com> | 2017-10-05 11:50:22 +0800 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-11-02 01:07:42 -0700 |
commit | 808ecf4ad087f80c2eee99af67549f05d5315694 (patch) | |
tree | 40bb85bab7d6e237b3798ac5f9492606e4503f3a /Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt | |
parent | clk: mediatek: mark mtk_infrasys_init_early __init (diff) | |
download | linux-dev-808ecf4ad087f80c2eee99af67549f05d5315694.tar.xz linux-dev-808ecf4ad087f80c2eee99af67549f05d5315694.zip |
dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC
This patch adds the binding documentation for apmixedsys, ethsys, hifsys,
infracfg, pericfg, topckgen and audsys for MT7622.
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt new file mode 100644 index 000000000000..9b8f578d5e19 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -0,0 +1,22 @@ +MediaTek AUDSYS controller +============================ + +The MediaTek AUDSYS controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be one of: + - "mediatek,mt7622-audsys", "syscon" +- #clock-cells: Must be 1 + +The AUDSYS controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +audsys: audsys@11220000 { + compatible = "mediatek,mt7622-audsys", "syscon"; + reg = <0 0x11220000 0 0x1000>; + #clock-cells = <1>; +}; |