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| author |   Chao Xie <xiechao.mail@gmail.com> | 2012-07-31 14:13:14 +0800 |
|---|---|---|
| committer |   Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-16 16:16:50 +0800 |
| commit | c2b7e05c753156dfba3240c59c400d557c5c8746 (patch) | |
| tree | 9d906c9594730b1d1305c1e2773dac163ea28984 /Documentation/devicetree/bindings/arm/mrvl | |
| parent | ARM: mmp&dove: modify tauros2_init call (diff) | |
| download | linux-dev-c2b7e05c753156dfba3240c59c400d557c5c8746.tar.xz linux-dev-c2b7e05c753156dfba3240c59c400d557c5c8746.zip | |
ARM: cache: add dt support for tauros2 cache
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/mrvl')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/mrvl/tauros2.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt new file mode 100644 index 000000000000..31af1cbb60bd --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt @@ -0,0 +1,17 @@ +* Marvell Tauros2 Cache + +Required properties: +- compatible : Should be "marvell,tauros2-cache". +- marvell,tauros2-cache-features : Specify the features supported for the + tauros2 cache. + The features including + CACHE_TAUROS2_PREFETCH_ON (1 << 0) + CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) + The definition can be found at + arch/arm/include/asm/hardware/cache-tauros2.h + +Example: + L2: l2-cache { + compatible = "marvell,tauros2-cache"; + marvell,tauros2-cache-features = <0x3>; + }; |