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authorOlof Johansson <olof@lixom.net>2018-01-04 23:30:28 -0800
committerOlof Johansson <olof@lixom.net>2018-01-04 23:30:28 -0800
commit8ef9aea80db6589f1ad9c6d985551091b0efa696 (patch)
tree80221624246a18c488694c38a3bd8fdae586e7bf /Documentation/devicetree/bindings/arm
parentMerge tag 'uniphier-dt64-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt (diff)
parentARM: dts: at91: sama5d2_ptc_ek: use TCB0 as timers (diff)
downloadlinux-dev-8ef9aea80db6589f1ad9c6d985551091b0efa696.tar.xz
linux-dev-8ef9aea80db6589f1ad9c6d985551091b0efa696.zip
Merge tag 'at91-ab-4.16-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
DT for 4.16 - New boards: - Axentia Nattis with Natte power - sama5d2 PTC ek - Document and use extended TCB bindings * tag 'at91-ab-4.16-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (50 commits) ARM: dts: at91: sama5d2_ptc_ek: use TCB0 as timers ARM: dts: at91: sama5d27_som1_ek: use TCB0 as timers ARM: dts: at91: sama5d2 Xplained: use TCB0 as timers ARM: dts: at91: sama5d2: TC blocks are also simple-mfd and syscon devices ARM: dts: at91: vinco: use TCB2 as timers ARM: dts: at91: ma5d4: use TCB2 as timers ARM: dts: at91: sama5d4 Xplained: use TCB2 as timers ARM: dts: at91: sama5d4ek: use TCB2 as timers ARM: dts: at91: sama5d4: Add TCB2 ARM: dts: at91: sama5d4: TC blocks are also simple-mfd and syscon devices ARM: dts: at91: linea/tse850-3: use TCB0 as timers ARM: dts: at91: sama5d3xek_cmp: use TCB0 as timers ARM: dts: at91: kizbox2: use TCB0 as timers ARM: dts: at91: sama5d3 Xplained: use TCB0 as timers ARM: dts: at91: sama5d3xek: use TCB0 as timers ARM: dts: at91: sama5d3: TC blocks are also simple-mfd and syscon devices ARM: dts: at91: kizboxmini: use TCB0 as timers ARM: dts: at91: cosino: use TCB0 as timers ARM: dts: at91: acme/g25: use TCB0 as timers ARM: dts: at91: at91sam9x5cm: use TCB0 as timers ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt32
-rw-r--r--Documentation/devicetree/bindings/arm/axentia.txt9
2 files changed, 9 insertions, 32 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 91cb8e4f2a4f..31220b54d85d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -90,38 +90,6 @@ System Timer (ST) required properties:
Its subnodes can be:
- watchdog: compatible should be "atmel,at91rm9200-wdt"
-TC/TCLIB Timer required properties:
-- compatible: Should be "atmel,<chip>-tcb".
- <chip> can be "at91rm9200" or "at91sam9x5"
-- reg: Should contain registers location and length
-- interrupts: Should contain all interrupts for the TC block
- Note that you can specify several interrupt cells if the TC
- block has one interrupt per channel.
-- clock-names: tuple listing input clock names.
- Required elements: "t0_clk", "slow_clk"
- Optional elements: "t1_clk", "t2_clk"
-- clocks: phandles to input clocks.
-
-Examples:
-
-One interrupt per TC block:
- tcb0: timer@fff7c000 {
- compatible = "atmel,at91rm9200-tcb";
- reg = <0xfff7c000 0x100>;
- interrupts = <18 4>;
- clocks = <&tcb0_clk>;
- clock-names = "t0_clk";
- };
-
-One interrupt per TC channel in a TC block:
- tcb1: timer@fffdc000 {
- compatible = "atmel,at91rm9200-tcb";
- reg = <0xfffdc000 0x100>;
- interrupts = <26 4 27 4 28 4>;
- clocks = <&tcb1_clk>;
- clock-names = "t0_clk";
- };
-
RSTC Reset Controller required properties:
- compatible: Should be "atmel,<chip>-rstc".
<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
diff --git a/Documentation/devicetree/bindings/arm/axentia.txt b/Documentation/devicetree/bindings/arm/axentia.txt
index ea3fb96ae465..de58f2463880 100644
--- a/Documentation/devicetree/bindings/arm/axentia.txt
+++ b/Documentation/devicetree/bindings/arm/axentia.txt
@@ -10,6 +10,15 @@ compatible = "axentia,linea",
and following the rules from atmel-at91.txt for a sama5d31 SoC.
+Nattis v2 board with Natte v2 power board
+-----------------------------------------
+
+Required root node properties:
+compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
+ "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+and following the rules from above for the axentia,linea CPU module.
+
+
TSE-850 v3 board
----------------