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authorLinus Torvalds <torvalds@linux-foundation.org>2016-05-16 17:39:29 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-05-16 17:39:29 -0700
commitb6ae4055f4ab55c05df31cc1b6a7ea8c85eb525d (patch)
tree1cf332545d918668e231590393f1ac144d908147 /Documentation/devicetree/bindings/arm
parentMerge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux (diff)
parentarm64: perf: don't expose CHAIN event in sysfs (diff)
downloadlinux-dev-b6ae4055f4ab55c05df31cc1b6a7ea8c85eb525d.tar.xz
linux-dev-b6ae4055f4ab55c05df31cc1b6a7ea8c85eb525d.zip
Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 perf updates from Will Deacon: "The main addition here is support for Broadcom's Vulcan core using the architected ID registers for discovering supported events. - Support for the PMU in Broadcom's Vulcan CPU - Dynamic event detection using the PMCEIDn_EL0 ID registers" * tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: perf: don't expose CHAIN event in sysfs arm64/perf: Add Broadcom Vulcan PMU support arm64/perf: Filter common events based on PMCEIDn_EL0 arm64/perf: Access pmu register using <read/write>_sys_reg arm64/perf: Define complete ARMv8 recommended implementation defined events arm64/perf: Changed events naming as per the ARM ARM arm64: dts: Add Broadcom Vulcan PMU in dts Documentation: arm64: pmu: Add Broadcom Vulcan PMU binding
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/pmu.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
index 6eb73be9433e..74d5417d0410 100644
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/pmu.txt
@@ -22,10 +22,11 @@ Required properties:
"arm,arm11mpcore-pmu"
"arm,arm1176-pmu"
"arm,arm1136-pmu"
+ "brcm,vulcan-pmu"
+ "cavium,thunder-pmu"
"qcom,scorpion-pmu"
"qcom,scorpion-mp-pmu"
"qcom,krait-pmu"
- "cavium,thunder-pmu"
- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
interrupt (PPI) then 1 interrupt should be specified.