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| author |   Scott Wood <scottwood@freescale.com> | 2015-10-06 22:48:19 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-10-27 18:13:29 -0500 |
| commit | 567cf94dc7801f6602a73b55f04cb096a3c351fb (patch) | |
| tree | 0ac4a9d508651f2dbb93d90ed2d5f999ff10b9af /Documentation/devicetree/bindings/chosen.txt | |
| parent | powerpc/book3e-64/kexec: create an identity TLB mapping (diff) | |
| download | linux-dev-567cf94dc7801f6602a73b55f04cb096a3c351fb.tar.xz linux-dev-567cf94dc7801f6602a73b55f04cb096a3c351fb.zip | |
powerpc/book3e-64/kexec: Enable SMP release
The SMP release mechanism for FSL book3e is different from when booting
with normal hardware. In theory we could simulate the normal spin
table mechanism, but not at the addresses U-Boot put in the device tree
-- so there'd need to be even more communication between the kernel and
kexec to set that up. Instead, kexec-tools will set a boolean property
linux,booted-from-kexec in the /chosen node.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: devicetree@vger.kernel.org
Diffstat (limited to 'Documentation/devicetree/bindings/chosen.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/chosen.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/chosen.txt b/Documentation/devicetree/bindings/chosen.txt index ed838f453f7a..6ae9d82d4c37 100644 --- a/Documentation/devicetree/bindings/chosen.txt +++ b/Documentation/devicetree/bindings/chosen.txt @@ -44,3 +44,11 @@ Implementation note: Linux will look for the property "linux,stdout-path" or on PowerPC "stdout" if "stdout-path" is not found. However, the "linux,stdout-path" and "stdout" properties are deprecated. New platforms should only use the "stdout-path" property. + +linux,booted-from-kexec +----------------------- + +This property is set (currently only on PowerPC, and only needed on +book3e) by some versions of kexec-tools to tell the new kernel that it +is being booted by kexec, as the booting environment may differ (e.g. +a different secondary CPU release mechanism) |