diff options
| author |   Fancy Fang <chen.fang@nxp.com> | 2019-10-28 08:07:59 +0000 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-10-28 19:32:37 +0800 |
| commit | 72b2429d40d878bfdd066b9401c9a5cbb2a755d3 (patch) | |
| tree | b6332377945fa655317bafa2cb4eaa0b134cb600 /Documentation/devicetree/bindings/clock | |
| parent | clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code (diff) | |
| download | linux-dev-72b2429d40d878bfdd066b9401c9a5cbb2a755d3.tar.xz linux-dev-72b2429d40d878bfdd066b9401c9a5cbb2a755d3.zip | |
clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock
The mipi pll clock comes from the MIPI PHY PLL output, so
it should not be a fixed clock.
MIPI PHY PLL is in the MIPI DSI space, and it is used as
the bit clock for transferring the pixel data out and its
output clock is configured according to the display mode.
So it should be used only for MIPI DSI and not be exported
out for other usages.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/imx7ulp-clock.txt | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx7ulp-clock.txt b/Documentation/devicetree/bindings/clock/imx7ulp-clock.txt index a4f8cd478f92..93d89adb7afe 100644 --- a/Documentation/devicetree/bindings/clock/imx7ulp-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx7ulp-clock.txt @@ -82,7 +82,6 @@ pcc2: pcc2@403f0000 { <&scg1 IMX7ULP_CLK_APLL_PFD0>, <&scg1 IMX7ULP_CLK_UPLL>, <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>, - <&scg1 IMX7ULP_CLK_MIPI_PLL>, <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>, <&scg1 IMX7ULP_CLK_ROSC>, <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>; |