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| author |   Taniya Das <quic_tdas@quicinc.com> | 2022-09-01 09:47:22 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2022-09-13 09:47:35 -0500 |
| commit | 7afdf3afff6f434a2c0b5d55e03ae14d7992d48c (patch) | |
| tree | 06610f4e3279cf032bb689ef9eff6c14afa4a5cf /Documentation/devicetree/bindings/clock | |
| parent | Linux 6.0-rc1 (diff) | |
| download | linux-dev-7afdf3afff6f434a2c0b5d55e03ae14d7992d48c.tar.xz linux-dev-7afdf3afff6f434a2c0b5d55e03ae14d7992d48c.zip | |
dt-bindings: clock: Add "qcom,adsp-pil-mode" property
When this property is set, the remoteproc is used to boot the
LPASS and therefore lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk
clocks would be used to bring LPASS out of reset and the rest of
the lpass clocks would be controlled directly by the remoteproc.
This is a cleanup done to handle overlap of regmap of
lpasscc and lpass_aon blocks.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-2-git-send-email-quic_c_skakit@quicinc.com
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 6 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 7 |
2 files changed, 9 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 47028d7b98e4..633887dc2f8a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -36,13 +36,11 @@ properties: items: - description: LPASS qdsp6ss register - description: LPASS top-cc register - - description: LPASS cc register reg-names: items: - const: qdsp6ss - const: top_cc - - const: cc required: - compatible @@ -59,8 +57,8 @@ examples: #include <dt-bindings/clock/qcom,lpass-sc7280.h> clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; - reg-names = "qdsp6ss", "top_cc", "cc"; + reg = <0x03000000 0x40>, <0x03c04000 0x4>; + reg-names = "qdsp6ss", "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index bad9135489de..5ccfb243756f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -41,6 +41,12 @@ properties: reg: maxItems: 1 + qcom,adsp-pil-mode: + description: + Indicates if the LPASS would be brought out of reset using + peripheral loader. + type: boolean + required: - compatible - reg @@ -165,6 +171,7 @@ examples: clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&lpasscore LPASS_CORE_CC_CORE_CLK>; clock-names = "bi_tcxo", "bi_tcxo_ao","iface"; + qcom,adsp-pil-mode; #clock-cells = <1>; #power-domain-cells = <1>; }; |