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authorLoc Ho <lho@apm.com>2016-01-19 19:27:41 -0700
committerStephen Boyd <sboyd@codeaurora.org>2016-01-29 12:54:33 -0800
commit7b63c567b5b3b3e366e6555d764318a75073f2c7 (patch)
tree09f07c8cf8f75376eb601454a4e6687d7e0e1074 /Documentation/devicetree/bindings/clock
parentclk: s2mps11: remove redundant code (diff)
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Documentation: Update APM X-Gene clock binding for v2 hardware
Update APM X-Gene clock binding documentation for SoC and PCP PLL for v2 hardware. Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/xgene.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/xgene.txt b/Documentation/devicetree/bindings/clock/xgene.txt
index 1c4ef773feea..82f9638121db 100644
--- a/Documentation/devicetree/bindings/clock/xgene.txt
+++ b/Documentation/devicetree/bindings/clock/xgene.txt
@@ -9,6 +9,8 @@ Required properties:
"apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
"apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
"apm,xgene-device-clock" - for a X-Gene device clock
+ "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
+ "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
Required properties for SoC or PCP PLL clocks:
- reg : shall be the physical PLL register address for the pll clock.