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| author |   Javier Martin <javier.martin@vista-silicon.com> | 2013-03-01 12:37:53 +0100 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2013-03-21 17:44:41 +0800 |
| commit | 5de8875281e1db024d67cbd5c792264194bfca2a (patch) | |
| tree | fd724bffecfd4fb373176f8a7b2409f8880c6f8c /Documentation/devicetree/bindings/crypto | |
| parent | hwrng: Fix a wrong comment in Documentation/hw_random.txt (diff) | |
| download | linux-dev-5de8875281e1db024d67cbd5c792264194bfca2a.tar.xz linux-dev-5de8875281e1db024d67cbd5c792264194bfca2a.zip | |
crypto: sahara - Add driver for SAHARA2 accelerator.
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.
This driver provides support for AES-CBC and AES-ECB
by now.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
| -rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt new file mode 100644 index 000000000000..5c65eccd0e56 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt @@ -0,0 +1,15 @@ +Freescale SAHARA Cryptographic Accelerator included in some i.MX chips. +Currently only i.MX27 is supported. + +Required properties: +- compatible : Should be "fsl,<soc>-sahara" +- reg : Should contain SAHARA registers location and length +- interrupts : Should contain SAHARA interrupt number + +Example: + +sah@10025000 { + compatible = "fsl,imx27-sahara"; + reg = < 0x10025000 0x800>; + interrupts = <75>; +}; |