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| author |   Andrew Lunn <andrew@lunn.ch> | 2012-09-03 20:29:34 +0200 |
|---|---|---|
| committer |   Jason Cooper <jason@lakedaemon.net> | 2012-09-22 14:40:00 +0000 |
| commit | f37fbd36c5f9fe716ddf783415a67de03fb0dc3d (patch) | |
| tree | ad911d76e1c4f3b66b7831b6beca4f3d4859be73 /Documentation/devicetree/bindings/crypto | |
| parent | ARM: Kirkwood: Describe iconnect nand in DT. (diff) | |
| download | linux-dev-f37fbd36c5f9fe716ddf783415a67de03fb0dc3d.tar.xz linux-dev-f37fbd36c5f9fe716ddf783415a67de03fb0dc3d.zip | |
Crypto: CESA: Add support for DT based instantiation.
Based on work by Michael Walle and Jason Cooper.
Added support for getting the interrupt number and address of SRAM
from DT.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Conflicts:
arch/arm/mach-kirkwood/board-dt.c
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
| -rw-r--r-- | Documentation/devicetree/bindings/crypto/mv_cesa.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt new file mode 100644 index 000000000000..47229b1a594b --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/mv_cesa.txt @@ -0,0 +1,20 @@ +Marvell Cryptographic Engines And Security Accelerator + +Required properties: +- compatible : should be "marvell,orion-crypto" +- reg : base physical address of the engine and length of memory mapped + region, followed by base physical address of sram and its memory + length +- reg-names : "regs" , "sram"; +- interrupts : interrupt number + +Examples: + + crypto@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>, + <0x4000000 0x800>; + reg-names = "regs" , "sram"; + interrupts = <22>; + status = "okay"; + }; |