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| author |   Enric Balletbo i Serra <enric.balletbo@collabora.com> | 2018-05-09 14:57:46 +0200 |
|---|---|---|
| committer |   MyungJoo Ham <myungjoo.ham@samsung.com> | 2018-07-18 13:58:37 +0900 |
| commit | 77f2c2305decda26885f8b2307577267b78c468f (patch) | |
| tree | 15100ad295fee7450c00167383b38364ae051f9c /Documentation/devicetree/bindings/devfreq | |
| parent | PM / devfreq: rk3399_dmc: remove wait for dcf irq event. (diff) | |
| download | linux-dev-77f2c2305decda26885f8b2307577267b78c468f.tar.xz linux-dev-77f2c2305decda26885f8b2307577267b78c468f.zip | |
dt-bindings: devfreq: rk3399_dmc: move interrupts to be optional.
In ATF we already wait for DDR DVFS finish, so move the interrupts properties
to be optional.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/devfreq')
| -rw-r--r-- | Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt index e0030a139383..0ec68141f85a 100644 --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt @@ -5,10 +5,6 @@ Required properties: - devfreq-events: Node to get DDR loading, Refer to Documentation/devicetree/bindings/devfreq/event/ rockchip-dfi.txt -- interrupts: The CPU interrupt number. The interrupt specifier - format depends on the interrupt controller. - It should be a DCF interrupt. When DDR DVFS finishes - a DCF interrupt is triggered. - clocks: Phandles for clock specified in "clock-names" property - clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon"; @@ -17,6 +13,12 @@ Required properties: - center-supply: DMC supply node. - status: Marks the node enabled/disabled. +Optional properties: +- interrupts: The CPU interrupt number. The interrupt specifier + format depends on the interrupt controller. + It should be a DCF interrupt. When DDR DVFS finishes + a DCF interrupt is triggered. + Following properties relate to DDR timing: - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/rk3399-ddr.h, |