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author | Enric Balletbo i Serra <enric.balletbo@collabora.com> | 2021-09-30 10:31:46 +0200 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2021-10-08 15:11:13 +0200 |
commit | 858d8e140c497b6ae7f0711273d4c8d525bf9584 (patch) | |
tree | a8ffe461214ac70f089b2f852b5b48672b4ca178 /Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | |
parent | dt-bindings: mediatek: Add #reset-cells to mmsys system controller (diff) | |
download | linux-dev-858d8e140c497b6ae7f0711273d4c8d525bf9584.tar.xz linux-dev-858d8e140c497b6ae7f0711273d4c8d525bf9584.zip |
dt-bindings: display: mediatek: add dsi reset optional property
Update device tree binding documentation for the dsi to add the optional
property to reset the dsi controller.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.3.Ifec72a83f224b62f24cfc967edfe78c5d276b2e3@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt')
-rw-r--r-- | Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index d30428b9fb33..36b01458f45c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -19,6 +19,11 @@ Required properties: Documentation/devicetree/bindings/graph.txt. This port should be connected to the input port of an attached DSI panel or DSI-to-eDP encoder chip. +Optional properties: +- resets: list of phandle + reset specifier pair, as described in [1]. + +[1] Documentation/devicetree/bindings/reset/reset.txt + MIPI TX Configuration Module ============================ @@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; |