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| author |   yt.shen@mediatek.com <yt.shen@mediatek.com> | 2017-03-31 19:30:28 +0800 |
|---|---|---|
| committer |   CK Hu <ck.hu@mediatek.com> | 2017-04-08 00:02:11 +0800 |
| commit | e3215713f878ddd63e8fac4d2cfb69a0782145ce (patch) | |
| tree | 492b842468ab82d9c6c6eecb21ceb888c3764b3c /Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | |
| parent | Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next (diff) | |
| download | linux-dev-e3215713f878ddd63e8fac4d2cfb69a0782145ce.tar.xz linux-dev-e3215713f878ddd63e8fac4d2cfb69a0782145ce.zip | |
dt-bindings: display: mediatek: update supported chips
Add decriptions about supported chips, including MT2701 & MT8173
Signed-off-by: YT Shen <yt.shen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 2b1585a34b85..fadf327c7cdf 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,6 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" + the supported chips are mt2701 and mt8173. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -25,6 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" + the supported chips are mt2701 and mt8173. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoder |