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authorFrank Wunderlich <frank-w@public-files.de>2020-08-19 10:17:46 +0200
committerChun-Kuang Hu <chunkuang.hu@kernel.org>2020-08-27 07:06:19 +0800
commitea6e3c31548ebd9be3d2405c680cac1706e7c7b2 (patch)
tree433696fa7929db8651a0b91fec3194c73dad792f /Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
parentLinux 5.9-rc1 (diff)
downloadlinux-dev-ea6e3c31548ebd9be3d2405c680cac1706e7c7b2.tar.xz
linux-dev-ea6e3c31548ebd9be3d2405c680cac1706e7c7b2.zip
dt-bindings: mediatek: add mt7623 display-nodes
mt7623 uses mt2701/mt8173 for drm, but have own compatibles Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt')
-rw-r--r--Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
index 8e4729de8c85..f06f24d405a5 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
@@ -7,7 +7,7 @@ channel output.
Required properties:
- compatible: "mediatek,<chip>-dsi"
- the supported chips are mt2701, mt8173 and mt8183.
+- the supported chips are mt2701, mt7623, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block.
- clocks: device clocks
@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
Required properties:
- compatible: "mediatek,<chip>-mipi-tx"
- the supported chips are mt2701, mt8173 and mt8183.
+- the supported chips are mt2701, 7623, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder