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| author |   Chen-Yu Tsai <wens@csie.org> | 2018-03-15 19:41:32 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-03-19 15:37:58 +0100 |
| commit | 54fb174216d8c9a80562056eccf11e7bd7c6b96b (patch) | |
| tree | 75f0478fdcfa4452442a461376190dd1c1860c21 /Documentation/devicetree/bindings/display/sunxi | |
| parent | drm/sun4i: Add support for A80 TCONs (diff) | |
| download | linux-dev-54fb174216d8c9a80562056eccf11e7bd7c6b96b.tar.xz linux-dev-54fb174216d8c9a80562056eccf11e7bd7c6b96b.zip | |
drm/sun4i: Add compatible strings for the A80 display pipeline
This patch adds compatible strings for the remaining documented
components of the Allwinner A80 display pipeline.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180315114136.24747-5-wens@csie.org
Diffstat (limited to 'Documentation/devicetree/bindings/display/sunxi')
| -rw-r--r-- | Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 671d75c76ad0..3346c1e2a7a0 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -191,7 +191,7 @@ DRC --- The DRC (Dynamic Range Controller), found in the latest Allwinner SoCs -(A31, A23, A33), allows to dynamically adjust pixel +(A31, A23, A33, A80), allows to dynamically adjust pixel brightness/contrast based on histogram measurements for LCD content adaptive backlight control. @@ -201,6 +201,7 @@ Required properties: * allwinner,sun6i-a31-drc * allwinner,sun6i-a31s-drc * allwinner,sun8i-a33-drc + * allwinner,sun9i-a80-drc - reg: base address and size of the memory-mapped region. - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the DRC @@ -227,6 +228,7 @@ Required properties: * allwinner,sun6i-a31-display-backend * allwinner,sun7i-a20-display-backend * allwinner,sun8i-a33-display-backend + * allwinner,sun9i-a80-display-backend - reg: base address and size of the memory-mapped region. - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the frontend and backend @@ -283,6 +285,7 @@ Required properties: * allwinner,sun6i-a31-display-frontend * allwinner,sun7i-a20-display-frontend * allwinner,sun8i-a33-display-frontend + * allwinner,sun9i-a80-display-frontend - reg: base address and size of the memory-mapped region. - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the frontend and backend @@ -339,6 +342,7 @@ Required properties: * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-h3-display-engine * allwinner,sun8i-v3s-display-engine + * allwinner,sun9i-a80-display-engine - allwinner,pipelines: list of phandle to the display engine frontends (DE 1.0) or mixers (DE 2.0) available. |