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authorDave Airlie <airlied@redhat.com>2022-07-12 15:50:41 +1000
committerDave Airlie <airlied@redhat.com>2022-07-12 16:50:05 +1000
commit8daecf611258d252b3107132d0143752b2e186fc (patch)
tree7e10777180fdb971aaaa94893648e4c123ad8981 /Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
parentMerge tag 'drm-misc-next-2022-07-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (diff)
parentdrm/tegra: vic: Use devm_platform_ioremap_resource() (diff)
downloadlinux-dev-8daecf611258d252b3107132d0143752b2e186fc.tar.xz
linux-dev-8daecf611258d252b3107132d0143752b2e186fc.zip
Merge tag 'drm/tegra/for-5.20-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next
drm/tegra: Changes for v5.20-rc1 The bulk of these changes adds support for context isolation for the various supported host1x engines, as well as support for the hardware found on the new Tegra234 SoC generation. There's also a couple of fixes and cleanups. To round things off, the device tree bindings are converted to the new json-schema format that allows DTBs to be validated. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708181136.673789-1-thierry.reding@gmail.com
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra Display Controller
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+ - Jon Hunter <jonathanh@nvidia.com>
+
+properties:
+ $nodename:
+ pattern: "^dc@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - nvidia,tegra20-dc
+ - nvidia,tegra30-dc
+ - nvidia,tegra114-dc
+ - nvidia,tegra124-dc
+ - nvidia,tegra210-dc
+
+ - items:
+ - const: nvidia,tegra124-dc
+ - const: nvidia,tegra132-dc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: display controller pixel clock
+ - description: parent clock # optional
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: dc
+ - const: parent # optional
+
+ resets:
+ items:
+ - description: module reset
+
+ reset-names:
+ items:
+ - const: dc
+
+ interconnect-names: true
+ interconnects: true
+
+ iommus:
+ maxItems: 1
+
+ operating-points-v2:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+
+ power-domains:
+ items:
+ - description: phandle to the core power domain
+
+ memory-region: true
+
+ nvidia,head:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: The number of the display controller head. This is used to setup the various
+ types of output to receive video data from the given head.
+
+ nvidia,outputs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: A list of phandles of outputs that this display controller can drive.
+
+ rgb:
+ type: object
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra20-dc
+ - nvidia,tegra30-dc
+ - nvidia,tegra114-dc
+ then:
+ properties:
+ interconnects:
+ items:
+ - description: window A memory client
+ - description: window B memory client
+ - description: window B memory client (vertical filter)
+ - description: window C memory client
+ - description: cursor memory client
+
+ interconnect-names:
+ items:
+ - const: wina
+ - const: winb
+ - const: winb-vfilter
+ - const: winc
+ - const: cursor
+
+ rgb:
+ description: Each display controller node has a child node, named "rgb", that represents
+ the RGB output associated with the controller.
+ type: object
+ properties:
+ nvidia,ddc-i2c-bus:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle of an I2C controller used for DDC EDID probing
+
+ nvidia,hpd-gpio:
+ description: specifies a GPIO used for hotplug detection
+ maxItems: 1
+
+ nvidia,edid:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ description: supplies a binary EDID blob
+
+ nvidia,panel:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle of a display panel
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra124-dc
+ then:
+ properties:
+ interconnects:
+ minItems: 4
+ items:
+ - description: window A memory client
+ - description: window B memory client
+ - description: window C memory client
+ - description: cursor memory client
+ - description: window D memory client
+ - description: window T memory client
+
+ interconnect-names:
+ minItems: 4
+ items:
+ - const: wina
+ - const: winb
+ - const: winc
+ - const: cursor
+ - const: wind
+ - const: wint
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/tegra20-car.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ dc@54200000 {
+ compatible = "nvidia,tegra20-dc";
+ reg = <0x54200000 0x00040000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA20_CLK_DISP1>;
+ clock-names = "dc";
+ resets = <&tegra_car 27>;
+ reset-names = "dc";
+ };