aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/gpio
diff options
context:
space:
mode:
authorQingtao Cao <qingtao.cao.au@gmail.com>2022-09-02 16:14:34 +1000
committerBartosz Golaszewski <brgl@bgdev.pl>2022-09-04 22:25:10 +0200
commit5134272f9f3f71d4e1f3aa15cb09321af49b3646 (patch)
treefed7562d45a8614dfe4908aa777752aa84bb398f /Documentation/devicetree/bindings/gpio
parentgpiolib: make fwnode_get_named_gpiod() static (diff)
downloadlinux-dev-5134272f9f3f71d4e1f3aa15cb09321af49b3646.tar.xz
linux-dev-5134272f9f3f71d4e1f3aa15cb09321af49b3646.zip
gpio: exar: access MPIO registers on cascaded chips
When EXAR xr17v35x chips are cascaded in order to access the MPIO registers (part of the Device Configuration Registers) of the secondary chips, an offset needs to be applied based on the number of primary chip's UART channels. Signed-off-by: Qingtao Cao <qingtao.cao@digi.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
0 files changed, 0 insertions, 0 deletions