Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull DeviceTree updates from Rob Herring:
 "A fairly large (by DT standards) pull request this time with the
  majority being some overdue moving DT binding docs around to
  consolidate similar bindings.

   - DT binding doc consolidation moving similar bindings to common
     locations.  The majority of these are display related which were
     scattered in video/, fb/, drm/, gpu/, and panel/ directories.

   - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all
     dtbs in the tree for most arches with dts files (except powerpc for
     now).

   - OF_IRQ=n fixes for user enabled CONFIG_OF.

   - of_node_put ref counting fixes from Julia Lawall.

   - Common DT binding for wakeup-source and deprecation of all similar
     bindings.

   - DT binding for PXA LCD controller.

   - Allow ignoring failed PCI resource translations in order to ignore
     64-bit addresses on non-LPAE 32-bit kernels.

   - Support setting the NUMA node from DT instead of only from parent
     device.

   - Couple of earlycon DT parsing fixes for address and options"

* tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits)
  MAINTAINERS: update DT binding doc locations
  devicetree: add Sigma Designs vendor prefix
  of: simplify arch_find_n_match_cpu_physical_id() function
  Documentation: arm: Fixed typo in socfpga fpga mgr example
  Documentation: devicetree: fix reference to legacy wakeup properties
  Documentation: devicetree: standardize/consolidate on "wakeup-source" property
  drivers: of: removing assignment of 0 to static variable
  xtensa: enable building of all dtbs
  mips: enable building of all dtbs
  metag: enable building of all dtbs
  metag: use common make variables for dtb builds
  h8300: enable building of all dtbs
  arm64: enable building of all dtbs
  arm: enable building of all dtbs
  arc: enable building of all dtbs
  arc: use common make variables for dtb builds
  of: add config option to enable building of all dtbs
  of/fdt: fix error checking for earlycon address
  of/overlay: add missing of_node_put
  of/platform: add missing of_node_put
  ...

1 files changed, 82 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt
new file mode 100644
index 000000000000..80994adab392
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt
@@ -0,0 +1,82 @@
+* Meta External Trigger Controller Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Meta external trigger controller.
+
+Required properties:
+
+    - compatible: Specifies the compatibility list for the interrupt controller.
+      The type shall be <string> and the value shall include "img,meta-intc".
+
+    - num-banks: Specifies the number of interrupt banks (each of which can
+      handle 32 interrupt sources).
+
+    - interrupt-controller: The presence of this property identifies the node
+      as an interrupt controller. No property value shall be defined.
+
+    - #interrupt-cells: Specifies the number of cells needed to encode an
+      interrupt source. The type shall be a <u32> and the value shall be 2.
+
+    - #address-cells: Specifies the number of cells needed to encode an
+      address. The type shall be <u32> and the value shall be 0. As such,
+      'interrupt-map' nodes do not have to specify a parent unit address.
+
+Optional properties:
+
+    - no-mask: The controller doesn't have any mask registers.
+
+* Interrupt Specifier Definition
+
+  Interrupt specifiers consists of 2 cells encoded as follows:
+
+    - <1st-cell>: The interrupt-number that identifies the interrupt source.
+
+    - <2nd-cell>: The Linux interrupt flags containing level-sense information,
+                  encoded as follows:
+                    1 = edge triggered
+                    4 = level-sensitive
+
+* Examples
+
+Example 1:
+
+	/*
+	 * Meta external trigger block
+	 */
+	intc: intc {
+		// This is an interrupt controller node.
+		interrupt-controller;
+
+		// No address cells so that 'interrupt-map' nodes which
+		// reference this interrupt controller node do not need a parent
+		// address specifier.
+		#address-cells = <0>;
+
+		// Two cells to encode interrupt sources.
+		#interrupt-cells = <2>;
+
+		// Number of interrupt banks
+		num-banks = <2>;
+
+		// No HWMASKEXT is available (specify on Chorus2 and Comet ES1)
+		no-mask;
+
+		// Compatible with Meta hardware trigger block.
+		compatible = "img,meta-intc";
+	};
+
+Example 2:
+
+	/*
+	 * An interrupt generating device that is wired to a Meta external
+	 * trigger block.
+	 */
+	uart1: uart@0x02004c00 {
+		// Interrupt source '5' that is level-sensitive.
+		// Note that there are only two cells as specified in the
+		// interrupt parent's '#interrupt-cells' property.
+		interrupts = <5 4 /* level */>;
+
+		// The interrupt controller that this device is wired to.
+		interrupt-parent = <&intc>;
+	};