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author | Ingo Molnar <mingo@kernel.org> | 2018-11-03 23:42:16 +0100 |
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committer | Ingo Molnar <mingo@kernel.org> | 2018-11-03 23:42:16 +0100 |
commit | 23a12ddee1ce28065b71f14ccc695b5a0c8a64ff (patch) | |
tree | cedaa1cde5b2557116e523c31552187804704093 /Documentation/devicetree/bindings/media/fsl-pxp.txt | |
parent | compat: Cleanup in_compat_syscall() callers (diff) | |
parent | objtool: Support GCC 9 cold subfunction naming scheme (diff) | |
download | linux-dev-23a12ddee1ce28065b71f14ccc695b5a0c8a64ff.tar.xz linux-dev-23a12ddee1ce28065b71f14ccc695b5a0c8a64ff.zip |
Merge branch 'core/urgent' into x86/urgent, to pick up objtool fix
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/media/fsl-pxp.txt')
-rw-r--r-- | Documentation/devicetree/bindings/media/fsl-pxp.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt new file mode 100644 index 000000000000..2477e7f87381 --- /dev/null +++ b/Documentation/devicetree/bindings/media/fsl-pxp.txt @@ -0,0 +1,26 @@ +Freescale Pixel Pipeline +======================== + +The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine +that supports scaling, colorspace conversion, alpha blending, rotation, and +pixel conversion via lookup table. Different versions are present on various +i.MX SoCs from i.MX23 to i.MX7. + +Required properties: +- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, + imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d. +- reg: the register base and size for the device registers +- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d. +- clock-names: should be "axi" +- clocks: the PXP AXI clock + +Example: + +pxp@21cc000 { + compatible = "fsl,imx6ull-pxp"; + reg = <0x021cc000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "axi"; + clocks = <&clks IMX6UL_CLK_PXP>; +}; |