aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mmc
diff options
context:
space:
mode:
authorChris Brandt <chris.brandt@renesas.com>2017-01-25 15:28:09 -0500
committerUlf Hansson <ulf.hansson@linaro.org>2017-02-13 13:20:42 +0100
commit62a4cdead56e5715c61aadd41ab66f49bd3170f1 (patch)
treef3eaa817ae080bb27eaa6258d49b16c01295b1d5 /Documentation/devicetree/bindings/mmc
parentmmc: sh_mobile_sdhi: add support for 2 clocks (diff)
downloadlinux-dev-62a4cdead56e5715c61aadd41ab66f49bd3170f1.tar.xz
linux-dev-62a4cdead56e5715c61aadd41ab66f49bd3170f1.zip
mmc: sh_mobile_sdhi: explain clock bindings
In the case of a single clock source, you don't need names. However, if the controller has 2 clock sources, you need to name them correctly so the driver can find the 2nd one. The 2nd clock is for the internal card detect logic. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r--Documentation/devicetree/bindings/mmc/tmio_mmc.txt13
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index a1650edfd2b7..4fd8b7acc510 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -25,6 +25,19 @@ Required properties:
"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
+- clocks: Most controllers only have 1 clock source per channel. However, on
+ some variations of this controller, the internal card detection
+ logic that exists in this controller is sectioned off to be run by a
+ separate second clock source to allow the main core clock to be turned
+ off to save power.
+ If 2 clocks are specified by the hardware, you must name them as
+ "core" and "cd". If the controller only has 1 clock, naming is not
+ required.
+ Below is the number clocks for each supported SoC:
+ 1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
+ R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
+ 2: R7S72100
+
Optional properties:
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
- pinctrl-names: should be "default", "state_uhs"