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| author |   Jisheng Zhang <jszhang@marvell.com> | 2016-08-17 15:57:37 -0500 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2016-08-18 08:00:44 -0500 |
| commit | 01c076732e8288485c22ef50f20949455a783ca9 (patch) | |
| tree | d97e1af85a190fa82a4266968f6ca3f46a59b0b5 /Documentation/devicetree/bindings/pci/designware-pcie.txt | |
| parent | PCI: designware: Add iATU Unroll feature (diff) | |
| download | linux-dev-01c076732e8288485c22ef50f20949455a783ca9.tar.xz linux-dev-01c076732e8288485c22ef50f20949455a783ca9.zip | |
PCI: designware: Check LTSSM training bit before deciding link is up
The link may be up but still in link training. In this case, we can't
think the link is up and operating correctly. Teach dw_pcie_link_up() to
be aware of the PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING bit.
Also rewrite PCIE_PHY_DEBUG_R1_LINK_UP definition so that it's consistent
with other macros.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/designware-pcie.txt')
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