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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2019-03-25 15:09:24 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-04-11 10:56:35 +0100 |
| commit | 47fe944138a6e34697e1778a74eff00ed9472b2a (patch) | |
| tree | 7800dcbce0d0b995837c161280963d9ac1cacb25 /Documentation/devicetree/bindings/pci/pci-keystone.txt | |
| parent | PCI: keystone: Cleanup error_irq configuration (diff) | |
| download | linux-dev-47fe944138a6e34697e1778a74eff00ed9472b2a.tar.xz linux-dev-47fe944138a6e34697e1778a74eff00ed9472b2a.zip | |
dt-bindings: PCI: keystone: Add "reg-names" binding information
Add "reg-names" binding information in order for device tree node
to be populated with the correct register strings.
This will break old DT compatibility. However Keystone PCI has never
worked in upstream kernel due to lack of SERDES support, so, before
SERDES support is added, cleanup the Keystone PCI dt-bindings.
This new binding will also be used by PCI in AM654 platform.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/pci-keystone.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/pci-keystone.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt index 2030ee0dc4f9..3a551687cfa2 100644 --- a/Documentation/devicetree/bindings/pci/pci-keystone.txt +++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt @@ -12,8 +12,10 @@ described here as well as properties that are not applicable. Required Properties:- compatibility: "ti,keystone-pcie" -reg: index 1 is the base address and length of DW application registers. - index 2 is the base address and length of PCI device ID register. +reg: Three register ranges as listed in the reg-names property +reg-names: "dbics" for the DesignWare PCIe registers, "app" for the + TI specific application registers, "config" for the + configuration space address pcie_msi_intc : Interrupt controller device node for MSI IRQ chip interrupt-cells: should be set to 1 |