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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2019-12-16 15:26:59 +0530 |
|---|---|---|
| committer | Kishon Vijay Abraham I <kishon@ti.com> | 2020-01-08 12:58:06 +0530 |
| commit | 56d34730c1a220d5015b672088e95f99e8b83b1f (patch) | |
| tree | 1af8ec0b1b987f55a3b8f82bd96c630817d31522 /Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt | |
| parent | phy: usb: Add support for wake and USB low power mode for 7211 S2/S5 (diff) | |
| download | linux-dev-56d34730c1a220d5015b672088e95f99e8b83b1f.tar.xz linux-dev-56d34730c1a220d5015b672088e95f99e8b83b1f.zip | |
dt-bindings: phy: Sierra: Add bindings for Sierra in TI's J721E
Add DT binding documentation for Sierra PHY IP used in TI's J721E
SoC.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt index 6e1b47bfce43..03f5939d3d19 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt @@ -2,21 +2,24 @@ Cadence Sierra PHY ----------------------- Required properties: -- compatible: cdns,sierra-phy-t0 -- clocks: Must contain an entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must be "phy_clk" +- compatible: Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform + Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC. - resets: Must contain an entry for each in reset-names. See ../reset/reset.txt for details. - reset-names: Must include "sierra_reset" and "sierra_apb". "sierra_reset" must control the reset line to the PHY. "sierra_apb" must control the reset line to the APB PHY - interface. + interface ("sierra_apb" is optional). - reg: register range for the PHY. - #address-cells: Must be 1 - #size-cells: Must be 0 Optional properties: +- clocks: Must contain an entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must contain "cmn_refclk_dig_div" and + "cmn_refclk1_dig_div" for configuring the frequency of + the clock to the lanes. "phy_clk" is deprecated. - cdns,autoconf: A boolean property whose presence indicates that the PHY registers will be configured by hardware. If not present, all sub-node optional properties must be |