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| author |   Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 18:47:06 +0200 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 11:10:34 +0200 |
| commit | 7bd6a26db6f9dade7dbd88a73120d17da1ee0e89 (patch) | |
| tree | 5e781dc2a2de0995ef81c0fa35fece6286a6ae6c /Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | |
| parent | pinctrl: mvebu: armada-39x: normalize SDIO pin naming (diff) | |
| download | linux-dev-7bd6a26db6f9dade7dbd88a73120d17da1ee0e89.tar.xz linux-dev-7bd6a26db6f9dade7dbd88a73120d17da1ee0e89.zip | |
pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins
This commit modifies the definition of the Device Bus interface pins
to be consistent accross SoCs. Especially, it removes the 'n'
indicators that we don't encode in the subnames of pins:
'dev(wen0)' becomes 'dev(we0)'
'dev(wen1)' becomes 'dev(we1)'
'dev(oen)' becomes 'dev(oe)'
etc.
In addition, it fixes the Armada 375 DT binding documentation, which
forgot to document the 'dev' function for MPP46, MPP57 and MPP63.
Since only the subnames are changed, this commit does not affect DT
compatibility.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt index e357b020861d..183c4723d9c8 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt @@ -52,8 +52,8 @@ mpp30 30 gpio, ge0(rxd7), ge1(rxclk), i2c1(sck) mpp31 31 gpio, tclk, ge0(txerr) mpp32 32 gpio, spi0(cs0) mpp33 33 gpio, dev(bootcs), spi0(cs0) -mpp34 34 gpo, dev(wen0), spi0(mosi) -mpp35 35 gpo, dev(oen), spi0(sck) +mpp34 34 gpo, dev(we0), spi0(mosi) +mpp35 35 gpo, dev(oe), spi0(sck) mpp36 36 gpo, dev(a1), spi0(miso) mpp37 37 gpo, dev(a0), sata0(prsnt) mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts) @@ -88,7 +88,7 @@ mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk), mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk) mpp60 60 gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rst-out), audio(sdi) -mpp61 61 gpo, dev(wen1), uart1(txd), audio(rclk) +mpp61 61 gpo, dev(we1), uart1(txd), audio(rclk) mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), audio(mclk), uart0(cts) mpp63 63 gpo, spi0(sck), tclk |