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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2015-06-09 18:47:08 +0200
committerLinus Walleij <linus.walleij@linaro.org>2015-06-10 13:35:33 +0200
commitdae5597f253ae2d44432c8648d9a9205de057ddf (patch)
treeac9840c5a241616e0c93458c13199330d95365f7 /Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
parentpinctrl: mvebu: armada-39x: align NAND pin naming (diff)
downloadlinux-dev-dae5597f253ae2d44432c8648d9a9205de057ddf.tar.xz
linux-dev-dae5597f253ae2d44432c8648d9a9205de057ddf.zip
pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins
This commit normalizes the naming of the TDM pins accross the different Marvell SoCs. Mainly it consists in: * Removing the 'n' from signal names: 'intn' becomes 'int' and 'rstn' becomes 'rst' * Renaming the main name 'tdm2c' to 'tdm' on Armada 38x. * Change the main name 'tdm-1' to 'tdm' for one of the pins of the Armada XP The last two changes affect DT compatibility, but since the TDM interface is nowhere near being supported in mainline, it should not be considered to be a serious problem at this point. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
index 183c4723d9c8..e6dce5d7ef8d 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
@@ -20,7 +20,7 @@ mpp3 3 gpio, i2c0(sda), uart0(rxd)
mpp4 4 gpio, cpu_pd(vdd)
mpp5 5 gpo, ge0(txclko), uart1(txd), spi1(clk), audio(mclk)
mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
-mpp7 7 gpo, ge0(txd1), tdm(tdx), audio(lrclk)
+mpp7 7 gpo, ge0(txd1), tdm(dtx), audio(lrclk)
mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
mpp9 9 gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo)
mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)