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| author |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-01-30 09:00:02 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-01-30 09:00:02 +0100 |
| commit | 858a0d7eb5300b5f620d98ab3c4b96c9d5f19131 (patch) | |
| tree | 79ad2ecb357183384b172155e44df71c86e24e49 /Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt | |
| parent | Revert "PM / sleep / ACPI: Use the ACPI_FADT_LOW_POWER_S0 flag" (diff) | |
| parent | PM / Hibernate: Use rb_entry() instead of container_of() (diff) | |
| download | linux-dev-858a0d7eb5300b5f620d98ab3c4b96c9d5f19131.tar.xz linux-dev-858a0d7eb5300b5f620d98ab3c4b96c9d5f19131.zip | |
Merge back earlier suspend/hibernation changes for v4.11.
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt index f9753c416974..b24583aa34c3 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt @@ -14,11 +14,6 @@ Required properies: - #size-cells : The value of this property must be 1 - ranges : defines mapping between pin controller node (parent) to gpio-bank node (children). - - interrupt-parent: phandle of the interrupt parent to which the external - GPIO interrupts are forwarded to. - - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node - which includes IRQ mux selection register, and the offset of the IRQ mux - selection register. - pins-are-numbered: Specify the subnodes are using numbered pinmux to specify pins. @@ -37,6 +32,11 @@ Required properties: Optional properties: - reset: : Reference to the reset controller + - interrupt-parent: phandle of the interrupt parent to which the external + GPIO interrupts are forwarded to. + - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node + which includes IRQ mux selection register, and the offset of the IRQ mux + selection register. Example: #include <dt-bindings/pinctrl/stm32f429-pinfunc.h> |