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authorPhilipp Zabel <p.zabel@pengutronix.de>2022-04-07 17:43:35 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2022-05-03 17:41:29 +0200
commite54bbcb02aeffda00a31c18372411f88b1615fa2 (patch)
tree119f0e349a43625a20cbbb740fc182887adc10b3 /Documentation/devicetree/bindings/reset
parentdt-bindings: reset: snps,axs10x-reset: Convert to yaml (diff)
downloadlinux-dev-e54bbcb02aeffda00a31c18372411f88b1615fa2.tar.xz
linux-dev-e54bbcb02aeffda00a31c18372411f88b1615fa2.zip
dt-bindings: reset: socfpga: Convert to yaml
Convert the device tree bindings for the Altera SOCFPGA reset manager to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220407154338.4190674-11-p.zabel@pengutronix.de
Diffstat (limited to 'Documentation/devicetree/bindings/reset')
-rw-r--r--Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml47
-rw-r--r--Documentation/devicetree/bindings/reset/socfpga-reset.txt16
2 files changed, 47 insertions, 16 deletions
diff --git a/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
new file mode 100644
index 000000000000..4379cec6b35a
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA Reset Manager
+
+maintainers:
+ - Dinh Nguyen <dinguyen@altera.com>
+
+properties:
+ compatible:
+ oneOf:
+ - description: Cyclone5/Arria5/Arria10
+ const: altr,rst-mgr
+ - description: Stratix10 ARM64 SoC
+ items:
+ - const: altr,stratix10-rst-mgr
+ - const: altr,rst-mgr
+
+ reg:
+ maxItems: 1
+
+ altr,modrst-offset:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Offset of the first modrst register
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - altr,modrst-offset
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ rstmgr@ffd05000 {
+ compatible = "altr,rst-mgr";
+ reg = <0xffd05000 0x1000>;
+ altr,modrst-offset = <0x10>;
+ #reset-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt
deleted file mode 100644
index 38fe34fd8b8a..000000000000
--- a/Documentation/devicetree/bindings/reset/socfpga-reset.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Altera SOCFPGA Reset Manager
-
-Required properties:
-- compatible : "altr,rst-mgr" for (Cyclone5/Arria5/Arria10)
- "altr,stratix10-rst-mgr","altr,rst-mgr" for Stratix10 ARM64 SoC
-- reg : Should contain 1 register ranges(address and length)
-- altr,modrst-offset : Should contain the offset of the first modrst register.
-- #reset-cells: 1
-
-Example:
- rstmgr@ffd05000 {
- #reset-cells = <1>;
- compatible = "altr,rst-mgr";
- reg = <0xffd05000 0x1000>;
- altr,modrst-offset = <0x10>;
- };