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| author |   Paolo Bonzini <pbonzini@redhat.com> | 2019-07-11 15:14:16 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-07-11 15:14:16 +0200 |
| commit | a45ff5994c9cde41af627c46abb9f32beae68943 (patch) | |
| tree | b726cc506ed1b01484f183ab2679cdd618e1e9b1 /Documentation/devicetree/bindings/riscv/sifive.yaml | |
| parent | Documentation: virtual: Add toctree hooks (diff) | |
| parent | KVM: arm/arm64: Initialise host's MPIDRs by reading the actual register (diff) | |
| download | linux-dev-a45ff5994c9cde41af627c46abb9f32beae68943.tar.xz linux-dev-a45ff5994c9cde41af627c46abb9f32beae68943.zip | |
Merge tag 'kvm-arm-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm updates for 5.3
- Add support for chained PMU counters in guests
- Improve SError handling
- Handle Neoverse N1 erratum #1349291
- Allow side-channel mitigation status to be migrated
- Standardise most AArch64 system register accesses to msr_s/mrs_s
- Fix host MPIDR corruption on 32bit
Diffstat (limited to 'Documentation/devicetree/bindings/riscv/sifive.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/riscv/sifive.yaml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/sifive.yaml b/Documentation/devicetree/bindings/riscv/sifive.yaml new file mode 100644 index 000000000000..9d17dc2f3f84 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/sifive.yaml @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: (GPL-2.0 OR MIT) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/sifive.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive SoC-based boards + +maintainers: + - Paul Walmsley <paul.walmsley@sifive.com> + - Palmer Dabbelt <palmer@sifive.com> + +description: + SiFive SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - sifive,freedom-unleashed-a00 + - const: sifive,fu540-c000 + - const: sifive,fu540 +... |